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Software Strobe Register. Expanded version of the ADC Software Trigger Register.
Offset = 0.
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D7 |
D6 |
D5 |
D4 |
D3 |
D2 |
D1 |
D0 |
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SSR7 |
SSR6 |
SSR5 |
SSR4 |
SSR3 |
SSR2 |
SSR1 |
SSR0 |
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NAME |
DIRECTION |
DEFAULT |
DESCRIPTION |
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SSR[7:0] |
w |
- |
Software Strobe Register |
if triggering is disabled (TEN='0') then any value written to the Software Strobe Register will cause a ADC-sample or ADC-burst can occur depending on configuration.
if triggering is enabled (TEN='1') then specific values written to the Software Stobe Register will cause either an ADC-sample or ADC-burst or trigger signalling as shown below.
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DATA VALUE WRITTEN |
TEN |
DESCRIPTION |
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0xXX (Don't care) |
0 |
Software controlled ADC-Sample or ADC-Burst |
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0x55 |
1 |
Software generated trigger start |
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0xAA |
1 |
Software generated trigger end (or stop) |
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0x5A |
1 |
Software generated trigger sync |
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Any value not equal to 0x55 or 0xAA or 0x5A |
1 |
Software controlled ADC-Sample or ADC-Burst |
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Copyright © 1997-2008 by Apex Embedded Systems. All rights reserved. Updated on Wednesday, April 02, 2008.
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Description