Name 

Description 

Summary 

Overview of the STX104 register set. 

Software Strobe (Offset=0) 

Software Strobe Register. Expanded version of the ADC Software Trigger Register. 

ADC Data LSB (Offset=0) 

ADC Data LSB. Please refer to ADC Data Register for further details. 

ADC Data MSB (Offset=1) 

ADC Data MSB. Please refer to ADC Data Register for further details. 

ADC Data (Offset=0) 

ADC Data Register. 

ADC Channel (Offset=2) 

ADC Channel Scan Register 

Digital Outputs (Offset=3) 

Digital Output Register. 

Digital Inputs (Offset=3) 

Digital Input Register. 

DAC Channel-A LSB (Offset=4) 

DAC Channel-A LSB. Please Refer to DAC Channel-A Register Details. 

DAC Channel-A MSB (Offset=5) 

DAC Channel-A MSB. Please Refer to DAC Channel-A Register Details. 

DAC Channel-A (Offset=4) 

DAC Channel-A Register 

DAC Channel-B LSB (Offset=6) 

DAC Channel-B LSB. Please Refer to DAC Channel-B Register Details. 

DAC Channel-B MSB (Offset=7) 

DAC Channel-B MSB. Please Refer to DAC Channel-B Register Details. 

DAC Channel-B (Offset=6) 

DAC Channel-B Register 

Clear Interrupts (Offset=8) 

Clear Interrupt Register 

ADC Status (Offset=8) 

ADC Status Register. 

ADC Control (Offset=9) 

ADC Control Register 

Pacer Clock Control (Offset=10) 

Pacer Clock Control 

FIFO Status MSB (Offset=10) 

FIFO Status MSB Register. 

ADC Configuration (Offset=11) 

ADC Configuration Register 

8254 CT0 Data (Offset=12, RB='0') 

8254 CTO Data Register. Please refer to the 8254 Configuration Register for further details. 

8254 CT1 Data (Offset=13, RB='0') 

8254 CT1 Data Register. Please refer to the 8254 Configuration Register for further details. 

8254 CT2 Data (Offset=14, RB='0') 

8254 CT2 Data Register. Please refer to the 8254 Configuration Register for further details. 

8254 Configuration (Offset=15, RB='0') 

8254 Configuration Register 

FIFO Status LSB (Offset=15) 

FIFO Status LSB Register. Please refer to FIFO Status MSB Register for details. 

Index Data LSB (Offset=12, RB='1') 

Index Data LSB. Please refer to Index Data Register for further details. 

Index Data MSB (Offset=13, RB='1') 

Index Data MSB. Please refer to Index Data Register for further details. 

Index Data (Offset=12, RB='1') 

Index Data Register 

Index Pointer (Offset=14, RB='1') 

Index Pointer Register. The purpose of utilizing an indexed array of registers is to fit a large number of registers into a small region of I/O address space. The indexed array of registers are banked onto of the 8254 I/O address space. At power up or reset, the entire STX104 register set will appear and function exactly as the previous firmware version of the STX104 card. By writing a special pattern to the ADC Configuration Register one can bank between the 8254 and indexed array registers as well as configure other STX104 registers for enhanced modes of operation. 

Conversion Disable (Offset=1028; Index=64, RB='1') 

Conversion Disable Register. DAS1602 Compatible Configuration Register. In 10-bit address decode mode, the DAS1602 compatible registers are also accessible through the indexed register set. 

Burst Mode Enable (Offset=1029; Index=65, RB='1') 

ADC Burst Mode Enable Register. DAS1602 Compatible Configuration Register. In 10-bit address decode mode, the DAS1602 compatible registers are also accessible through the indexed register set. 

Burst Function Enable (Offset=1030; Index=66, RB='1') 

ADC Function Enable Register. DAS1602 Compatible Configuration Register. In 10-bit address decode mode, the DAS1602 compatible registers are also accessible through the indexed register set. 

Extended Status (Offset=1031; Index=67, RB='1') 

ADC Extended Status Register. DAS1602 Compatible Configuration Register. In 10-bit address decode mode, the DAS1602 compatible registers are also accessible through the indexed register set. 

General Configuration (Index=0, RB='1') 

General Configuration Register 

Interrupt Source Select (Index=2, RB='1') 

Interrupt Source Select Register 

Interrupt Configuration (Index=4, RB='1') 

Interrupt Source Select Register 

Interrupt Threshold (Index=8, RB='1') 

Interrupt Threshold Register 

Digital Output Configuration (Index=12, RB='1') 

Digital Output Configuration Register 

Digital Input Configuration (Index=14, RB='1') 

Digital Input Register 

Trigger Configuration (Index=16, RB='1') 

Trigger Configuration Register 

Trigger Start Delay (Index=20, RB='1') 

Trigger Start Delay Register. Range is 0 to 53.68 Seconds in steps of 25 nanoseconds. 

Analog Input General Configuration (Index=32, RB='1') 

Analog Input General Configuration Register 

Analog Input Frame Timer (Index=36, RB='1') 

Analog Input Frame Timer Register. Range is 5 uSec to 53.68 Seconds in steps of 25 nanoseconds. 

Analog Input Burst Timer (Index=40, RB='1') 

Analog Input Burst Timer. Adjusts timing between samples during ADC-burst mode. 

Analog Input Frame Maximum (Index=44, RB='1') 

Analog Input Frame Maximum Register. Maximum Frame range is 0 to 2,147,483,648 Frames. 

Analog Input Frame Counter (Index=48, RB='1') 

Analog Input Frame Count Register. 

Miscellaneous Output Configuration Register (Index=208, RB='1') 

Miscellaneous Output Configuration Register 

FIFO Data Available (Index=224, RB='1') 

FIFO Data Available Register 

FIFO Configuration (Index=228, RB='1') 

FIFO Configuration Register 

Scratch Pad (Index=248, RB='1') 

Scratch Pad Register 

Board ID (Index=250, RB='1') 

Board Identification Register