Conversion Disable (Offset=1028; Index=64, RB='1')

Conversion Disable Register. DAS1602 Compatible Configuration Register. In 10-bit address decode mode, the DAS1602 compatible registers are also accessible through the indexed register set.

Offset=0x404, RB=X. Also located at: Index=0x40, Byte 0, RB='1'.

D7	D6	D5	D4	D3	D2	D1	D0
CD7	CD6	CD5	CD4	CD3	CD2	CD1	CD0

Bit Definitions

NAME	DIRECTION	DEFAULT	DESCRIPTION
CD[7:0]	w	0x00	Conversion Disable Register. On power-up or reset the conversion triggers are enabled. This register is only available if FE bit is true (DAS1602 Functions are enabled). Writing a 0x00 to this register enables ADC triggering. Writing 0x40 (64₁₀) to this register disables ADC triggering. If the FIFO Superset jumper M1 is not installed, then when conversions are disabled, the FIFO is reset. If the jumper M1 is installed, the FIFO is only reset by writing to the channel register.

Description

Conversion Disable Register. On power-up or reset the conversion triggers are enabled. This register is only available if FE bit is true (DAS1602 Functions are enabled). Writing a 0x00 to this register enables ADC triggering. Writing 0x40 (64₁₀) to this register disables ADC triggering. If the FIFO Superset jumper M1 is not installed, then when conversions are disabled, the FIFO is reset. If the jumper M1 is installed, the FIFO is only reset by writing to the channel register.